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 NL17SZ125 Non-Inverting 3-State Buffer
The NL17SZ125 is a high performance non-inverting buffer operating from a 1.65 V to 5.5 V supply.
* * * * * * * * * * *
Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5.0 V Designed for 1.65 V to 5.5 V VCC Operation Overvoltage Tolerant Inputs and Outputs LVTTL Compatible - Interface Capability With 5.0 V TTL Logic with VCC = 3.0 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements 3-State OE Input is Active-Low Replacement for NC7SZ125 Chip Complexity = 36 FETs Pb-Free Packages are Available
http://onsemi.com MARKING DIAGRAM
SC-88A (SOT-353) DF SUFFIX CASE 419A
M0 M G G
M
M0 MG G SOT-553 XV5 SUFFIX CASE 463B
OE
1
5
VCC
IN A
2
M0 = Specific Device Code D = Date Code G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location.
GND
3
4
OUT Y
Figure 1. Pinout (Top View)
1 2 3 OE IN A EN OUT Y 4 5
PIN ASSIGNMENT
OE IN A GND OUT Y VCC
Figure 2. Logic Symbol FUNCTION TABLE
OE Input L L H X = Don't Care A Input L H X Y Output L H Z
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2005
September, 2005 - Rev. 5
1
Publication Order Number: NL17SZ125/D
NL17SZ125
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIK IOK IOUT ICC TSTG TL TJ qJA PD MSL FR VESD DC Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Sink Current DC Supply Current per Supply Pin Storage Temperature Range Lead Temperature, 1 mm from Case for 10 Seconds Junction Temperature Under Bias Thermal Resistance (Note 1) Power Dissipation in Still Air at 85C Moisture Sensitivity Flammability Rating ESD Withstand Voltage Oxygen Index: 28 to 34 Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) Parameter Value -0.5 to )7.0 -0.5 to )7.0 -0.5 to )7.0 -50 -50 $50 $100 -65 to )150 260 )150 350 150 Level 1 UL 94 V-0 @ 0.125 in u2000 u200 N/A V Unit V V V mA mA mA mA C C C C/W mW
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2 ounce copper trace with no air flow. 2. Tested to EIA/JESD22-A114-A. 3. Tested to EIA/JESD22-A115-A. 4. Tested to JESD22-C101-A.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN VOUT TA tr, tf DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature Range Input Rise and Fall Time VCC = 1.8 V $0.15 V VCC = 2.5 V $0.2 V VCC = 3.0 V $0.3 V VCC = 5.0 V $0.5 V Parameter Min 1.65 0 0 -40 0 0 0 0 Max 5.5 5.5 5.5 +125 20 20 10 5.0 Unit V V V C ns/V
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS TIME TO 0.1% BOND FAILURES
Junction Temperature C 80 90 100 110 120 130 140 Time, Hours 1,032,200 419,300 178,700 79,600 37,000 17,800 8,900 Time, Years 117.8 47.9 20.4 9.4 4.2 2.0 1.0
FAILURE RATE OF PLASTIC = CERAMIC UNTIL INTERMETALLICS OCCUR TJ = 130C TJ = 120C TJ = 100C TJ = 110C TJ = 90C TJ = 80C 100 TIME, YEARS
1 1 10 1000
Figure 3. Failure Rate vs. Time Junction Temperature
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NL17SZ125
DC ELECTRICAL CHARACTERISTICS
Symbol VIH VIL VOH Parameter High-Level Input Voltage Low-Level Input Voltage High-Level Output Voltage VIN = VIH VCC (V) 1.65 to 1.95 2.3 to 5.5 1.65 to 1.95 2.3 to 5.5 1.65 1.8 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 VOL Low-Level Output Voltage VIN = VIL 1.65 1.8 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 IIN IOZ IOFF ICC Input Leakage Current 3-State Output Leakage Power Off Leakage Current Quiescent Supply Current 0 to 5.5 1.65 to 5.5 0.0 1.65 to 5.5 1.55 1.7 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 1.65 1.8 2.3 3.0 4.5 1.52 2.15 2.80 2.68 4.20 0.0 0.0 0.0 0.0 0.0 0.08 0.10 0.15 0.22 0.22 0.1 0.1 0.1 0.1 0.1 0.24 0.30 0.40 0.55 0.55 $1.0 $0.5 1.0 1.0 TA = 255C Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC 1.55 1.7 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 0.1 0.1 0.1 0.1 0.1 0.24 0.30 0.40 0.55 0.55 $1.0 $5.0 10 10 Typ Max -405C v TA v 1255C Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC Max Unit V V V IOH = -100 mA Condition
V
IOH = -4 mA IOH = -8 mA IOH = -16 mA IOH = -24 mA IOH = -32 mA IOL = 100 mA
V
V
IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 0 V v VIN v 5.5 V VIN = VIH or VIL 0 V v VOUT v 5.5 V VIN or VOUT = 5.5 V VIN = 5.5 V, GND
mA mA mA mA
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3
NL17SZ125
AC ELECTRICAL CHARACTERISTICS (tR = tF = 3.0 ns)
Symbol tPLH tPHL Parameter Propagation Delay AN to YN (Figures 4 and 5, Table 1) Condition RL = 1 MW RL = 1 MW RL = 1 MW RL = 500 W RL = 1 MW RL = 500 W tPZH tPZL Output Enable Time (Figures 6, 7and 8, Table 1) RL = 250 W CL = 15 pF CL = 15 pF CL = 15 pF CL = 50 pF CL = 15 pF CL = 50 pF CL = 50 pF VCC (V) 1.8 $ 0.15 2.5 $ 0.2 3.3 $ 0.3 5.0 $ 0.5 1.8 $ 0.15 2.5 $ 0.2 3.3 $ 0.3 5.0 $ 0.5 tPHZ tPLZ Output Disable Time (Figures 6, 7and 8, Table 1) RL and R1= 500 W CL = 50 pF 1.8 $ 0.15 2.5 $ 0.2 3.3 $ 0.3 5.0 $ 0.5 TA = 255C Min 2.0 1.0 0.8 1.2 0.5 0.8 2.0 1.8 1.2 0.8 2.0 1.5 0.8 0.3 8.0 7.6 Typ 9.0 Max 10 7.5 5.2 5.7 4.5 5.0 9.5 8.5 6.2 5.5 10 8.0 5.7 4.7 -405C v TA v 1255C Min 2.0 1.0 0.8 1.2 0.5 0.8 2.0 1.8 1.2 0.8 2.0 1.5 0.8 0.3 Max 10.5 8.0 5.5 6.0 4.8 5.3 10 9.0 6.5 5.8 10.5 8.5 6.0 5.0 ns ns Unit ns
CAPACITIVE CHARACTERISTICS
Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (Note 5) Parameter Condition VCC = 5.5 V, VI = 0 V or VCC VCC = 5.5 V, VI = 0 V or VCC 10 MHz, VCC = 3.3 V, 10 MHz, VCC = 5.5 V, VI = 0 V or VCC VI = 0 V or VCC Typical 2.5 2.5 9 11 Unit pF pF pF
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
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NL17SZ125
tf = 3 ns
90% Vmi 10% 90% Vmi 10%
tf = 3 ns VCC INPUT GND
OE = GND OUTPUT CL* RL
INPUT A and B
tPHL
tPLH VOH
Vmo Vmo
OUTPUT Y
VOL
*Includes all probe and jig capacitance. A 1 MHz square input wave is recommended for propagation delay tests.
Figure 4. Switching Waveform
2 INPUT VCC INPUT
Figure 5. TPLH or TPHL
R1 = 500 W OUTPUT CL = 50 pF RL = 500 W
VCC
OUTPUT CL = 50 pF RL = 250 W
A 1 MHz square input wave is recommended for propagation delay tests.
A 1 MHz square input wave is recommended for propagation delay tests.
Figure 6. TPZL or TPL
Figure 7. TPZH or TPHZ
2.7 V
OE tPZH On
Vmi tPHZ Vmo
Vmi 0V VCC VOH - 0.3 V 0V
tPZL On Vmo
tPLZ
3.0 V VOL + 0.3 V GND
Figure 8. AC Output Enable and Disable Waveform Table 1. Output Enable and Disable Times tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
VCC Symbol Vmi Vmo 3.3 V $ 0.3 V 1.5 V 1.5 V 2.7 V 1.5 V 1.5 V 2.5 V $ 0.2 V VCC/2 VCC/2
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NL17SZ125
DEVICE ORDERING INFORMATION
Device NL17SZ125DFT2 NL17SZ125DFT2G NL17SZ125XV5T2G Package SC-88A (SOT-353) SC-88A (SOT-353) (Pb-Free) SOT-553 (Pb-Free) Shipping 3000 / Tape & Reel 3000 / Tape & Reel 4000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NL17SZ125
PACKAGE DIMENSIONS
SC-88A, SOT-353, SC-70 CASE 419A-02 ISSUE J
A G
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A-01 OBSOLETE. NEW STANDARD 419A-02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. DIM A B C D G H J K N S INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --- 0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --- 0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20
5
4
S
1 2 3
-B-
D 5 PL
0.2 (0.008)
M
B
M
N J C
H
K
SOLDERING FOOTPRINT*
0.50 0.0197
0.65 0.025 0.65 0.025
0.40 0.0157 1.9 0.0748
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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7
NL17SZ125
PACKAGE DIMENSIONS
SOT-553, 5 LEAD CASE 463B-01 ISSUE B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. DIM A b c D E e L HE MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 INCHES NOM MAX 0.022 0.024 0.009 0.011 0.005 0.007 0.063 0.067 0.047 0.051 0.020 BSC 0.004 0.008 0.012 0.059 0.063 0.067 MIN 0.020 0.007 0.003 0.059 0.043
D -X-
5 4
A
L
1
2
3
E -Y- b 5 PL 0.08 (0.003)
HE
e
c
M
XY
SOLDERING FOOTPRINT*
0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394
0.5 0.5 0.0197 0.0197
SCALE 20:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: N. American Technical Support: 800-282-9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Phone: 81-3-5773-3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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8
NL17SZ125/D


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